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Answer the following from the logic gate diagram.
From the logic gate diagram given below: Derive Boolean expression for X(A, B, C) and draw the…
From the logic gate diagram given below:
(a)[4.0]
Derive Boolean expression for X(A, B, C) and draw the truth table.
(b)[1.0]
Write the canonical expression for SUM and CARRY of a half adder.
Answer
Answer (a)
AITruth Table for X(A,B,C):
Final reduced expression: X(A,B,C) = A' + B' + C'
| A | B | C | X |
|---|---|---|---|
| 0 | 0 | 0 | 1 |
| 0 | 0 | 1 | 1 |
| 0 | 1 | 0 | 1 |
| 0 | 1 | 1 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 0 | 1 | 1 |
| 1 | 1 | 0 | 1 |
| 1 | 1 | 1 | 0 |
- From the diagram: the top gate is a 2-input NAND gate with inputs A,B giving output (A.B)'.
- The bottom gate is a 2-input XOR (Ex-OR) gate with inputs B,C giving output B.C' + B'.C.
- The final OR gate combines both outputs: X = (A.B)' + (B.C' + B'.C)
- By De Morgan's law, (A.B)' = A' + B'
- So X = A' + B' + B.C' + B'.C
- By the identity B' + B.C' = B' + C' (Distributive law: B' + BC' = (B'+B).(B'+C') = B'+C'), X = A' + (B'+C') + B'.C = A' + B' + C' + B'.C
- By the Absorption law, B' + B'.C = B', so X = A' + B' + C'
Answer (b)
AIFor a half adder with inputs A, B: SUM = A'B + AB' (canonical SOP, equivalent to A XOR B). CARRY = A.B (canonical AND term).
From ISC 2025 Improvement Computer Science Paper 1, question 4(ii).