How is a decoder different from a multiplexer? Write the truth table and draw the logic circuit…

A decoder is a combinational circuit with n input lines and up to $2^n$ output lines; for each input combination it activates exactly one unique output line, i.e. it converts (decodes) a binary code into an individual output signal. A multiplexer (MUX) is a combinational circuit with $2^n$ data input lines, n select lines and a single output line; based on the binary value on the select lines it selects one of the many data inputs and routes it to the single output. So a decoder is a 1-input-code-to-many-output device, while a multiplexer is a many-input-to-1-output (selector) device - they perform opposite (complementary) operations. 3-to-8 decoder truth table (inputs A2 A1 A0; outputs D0..D7, only one output is 1 for each input row):

A2	A1	A0	D0	D1	D2	D3	D4	D5	D6	D7
0	0	0	1	0	0	0	0	0	0	0
0	0	1	0	1	0	0	0	0	0	0
0	1	0	0	0	1	0	0	0	0	0
0	1	1	0	0	0	1	0	0	0	0
1	0	0	0	0	0	0	1	0	0	0
1	0	1	0	0	0	0	0	1	0	0
1	1	0	0	0	0	0	0	0	1	0
1	1	1	0	0	0	0	0	0	0	1

Logic circuit: Inputs A2, A1, A0 and their complements A2', A1', A0' (obtained via NOT gates) are fed into eight 3-input AND gates, one per output line, each wired to the unique combination of true/complemented inputs matching its minterm, e.g. $D0=A2'.A1'.A0'$, $D1=A2'.A1'.A0$, $D2=A2'.A1.A0'$, ..., $D7=A2.A1.A0$. Working: For any given 3-bit binary input on A2 A1 A0, only the one AND gate whose input combination exactly matches that pattern produces an output of 1; all other AND gates output 0 because at least one of their inputs is 0. Thus the decoder 'decodes' the binary value present on its 3 input lines by activating exactly the corresponding one of its 8 output lines.