Draw the logic gate diagram for 8 : 1 multiplexer.
Computer Science20263 marksDrawing
Draw: Logic gate diagram for an 8 : 1 multiplexer
Must show: 8 data inputs, 3 select lines, output
Answer
Answer
AI
Logic gate diagram of an 8:1 multiplexer: data inputs $I_0$ to $I_7$, select lines $S_2 S_1 S_0$ (with their complements), eight 4-input AND gates (one for each select combination) and an 8-input OR gate.
$Y = S_2'S_1'S_0'I_0 + S_2'S_1'S_0I_1 + S_2'S_1S_0'I_2 + S_2'S_1S_0I_3 + S_2S_1'S_0'I_4 + S_2S_1'S_0I_5 + S_2S_1S_0'I_6 + S_2S_1S_0I_7$
